Fabrication and characterization of n-ZnO on p-SiC heterojunction diodes on 4H-SiC substrates

We report on the growth and characterization of n-ZnO/p-4H-SiC heterojunction diodes. Our n-ZnO layers were grown with radical-source molecular beam epitaxy (RS-MBE) on p-4H-SiC epilayers, which was previously prepared in a horizontal hot-wall reactor by chemical vapour deposition (CVD) on the n-type 4H-SiC wafers. Details on the n-ZnO growth on 8∘-off 4H-SiC wafers, the quality of the layers and the nature of realized p–n structures are discussed. Mesa diode structures were fabricated. Al was sputtered through a circle mask with diameter 1 mm and annealed to form Ohmic contacts to p-SiC. Ohmic contacts to the n-ZnO were formed by 30 nm/300 nm Ti/Au sputtered by electron beam evaporation. Electrical properties of the structures obtained have been studied with Hall measurements, and current–voltage measurements (I–V).I–V measurements of the device showed good rectifying behavior, from which a turn-on voltage of about 2 V was obtained.

Source: Superlattices and Microstructures

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Progress in the use of 4H-SiC semi-insulating wafers for microwave power MESFETs

The use of Silicon Carbide semi-insulating wafers has to be mastered in order to reach output power densities up to 3–4 W mm⁻¹ in the 1–2 GHz frequency range (values that are currently targeted). This study shows that the buffer layer doping level and thickness have a great influence on the MESFET behavior. We have studied three epilayer configuration on SI substrates that differ only by the buffer layer. On two of them, a slow drain current decrease in d.c. mode was observed. On the third one, no d.c. current drift was observed without rf input power, but drain current decreases instantaneously when rf input power is switched on. Traps, located either in the buffer layer or in the substrate are supposed to be responsible for these drift phenomena. Load–pull measurements were performed at 2 GHz on transistors fabricated on the three different structures. One of them, with a 2 mm gate periphery, has been measured under 72 V drain–source bias voltage and 2.1 W mm⁻¹ power density was obtained at 2 GHz. We believe these results are the first to be published on a SiC MESFET with d.c. bias voltage over 70 V.

Source: Materials Science and Engineering: B

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Electrical activation of implanted phosphorus ions in [0001]- and [11–20]-oriented 4H-SiC

Aluminum-doped 4H-SiC epilayers with [0001]- or [11–20]-oriented faces were implanted with phosphorus and subsequently annealed in a temperature range of 1550–1700 °C. The electrical activation of phosphorus ions was studied by Hall effect investigations. Identical free electron concentrations are observed at high temperatures in both types of SiC samples indicating that the electrical activation of implanted phosphorus ions is independent of the orientation of the wafers. The compensation generated by the phosphorus implantation is greater in 4H-SiC samples with (0001) face. Phosphorus donor concentrations above 1020 cm-3 could be activated and an extremely low sheet resistance of 29 Ω/◻ was determined in the implanted 4H-SiC layer. 

Source:IEEE

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Single-crystalline 4H-SiC micro cantilevers with a high quality factor

Single-crystalline 4H-SiC micro cantilevers were fabricated by doping-type selective electrochemical etching of 4H-SiC. Using this method, n-type 4H-SiC cantilevers were fabricated on a p-type 4H-SiC substrate, and resonance characteristics of the fabricated 4H-SiC cantilevers were investigated under a vacuum condition. The resonant frequencies agreed very well with the results of numerical simulations. The maximum quality factor in first-mode resonance of the 4H-SiC cantilevers was 230,000. This is 10 times higher than the quality factor of conventional 3C-SiC cantilevers fabricated on an Si substrate.

Highlights

• We fabricated single-crystalline 4H-SiC cantilevers by electrochemical etching.

• Very sharp resonance was observed for the fabricated 4H-SiC cantilevers.

• The maximum quality factor of 4H-SiC cantilevers is 230,000.

• The quality factor is 10 times higher than that of 3C-SiC cantilevers.

Source: Sensors and Actuators A: Physical

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The growth of low resistivity, heavily Al-doped 4H–SiC thick epilayers by hot-wall chemical vapor deposition

Heavily Al-doped 4H–SiC thick epilayers (∼90 μm) were grown on 3-in n⁺ 4H–SiC wafers by using the hot-wall CVD method. On the purpose of enhancing incorporated Al-dopant concentration, the growth condition dependence of the Al incorporation behavior in the heavy doping range near Al solubility limit in 4H–SiC was investigated by varying the growth parameters, i.e., growth rate, pressure, temperature and Al-dopant source flow rate. A series of thick epilayers possessing Al-dopant concentration from 9.6×10¹⁹ to 4.7×10²⁰ cm⁻³ were obtained. Among them, the epilayer with Al-dopant concentration of 3.5×10²⁰ cm⁻³ demonstrates a comparably low resistivity of 16.5 mΩ cm as that of commercial n⁺ 4H–SiC wafer. The incorporated Al-dopant concentration dependences on surface morphology, crystalline quality and crystal structures of the heavily Al-doped thick epilayers on n⁺ 4H–SiC substrates were characterized and discussed.

Highlights

• We report the growth of 90 μm thick, heavily Al-doped 4H–SiC epilayers by HW-CVD.

• A relatively high growth rate of about 22 μm/h is verified.

• The resistivity of 16.5 mΩ cm and Al concentration of 3.5×10²⁰ cm⁻³ are achieved.

• The morphology, resistivity, quality and lattice constant change are reported.

Source: Journal of Crystal Growth

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