Apr 19, 2020

(Invited) Understanding of Growth Kinetics of Thermal Oxides on 4H-SiC (0001) for Control of MOS Characteristics

Control of thermal oxidation conditions is inevitable to achieve a high-quality MOS interface on SiC substrates. We investigated the kinetics and thermodynamics of 4H-SiC oxidation for nanometer-thick SiO2/SiC system, to find out thermodynamically preferred conditions for a smooth elimination of carbon byproduct from the interface. A linear regime of thermal oxidation of 4H-SiC (0001) was clearly observed with a high activation energy corresponding to direct CO ejection from the interface. Based on our understanding of oxidation kinetics, we found that nearly-ideal MOS characteristics with reduced interface state density ~1011 cm-2eV-1 or less, were achievable on 4H-SiC (0001) only by dry oxidation processes.

Source:IOPscience

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Apr 12, 2020

Epitaxial Deposition of SiC onto 4H SiC using a Hollow Cathode

Thin films of SiC were deposited using DC, RF and pulsed sputtering of a hollow cathode. The majority of the films were deposited using RF sputtering at temperatures ranging from 610 to 858 degrees C. Initial films were deposited onto Si substrates in order to determine deposition rates, film uniformity, and film composition. The introduction of a rotating substrate holder greatly improved the film thickness and composition uniformity. The samples were characterized using X-ray diffraction (XRD), Raman spectroscopy, optical absorption, and infrared ellipsometry. The initial films were polycrystalline in nature independent of the substrate used for deposition. The 4H/3C polytype ratio increases strongly for elevated substrate temperatures for the films which were grown homo-epitaxially on 4H SiC. This observation suggests a new avenue for homo-epitaxial growth of SiC onto 4H SiC and rapid hollow cathode sputtering is envisioned for the growth of single crystal films of 4H SiC for future device applications.

Source:IOPscience

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Apr 6, 2020

Characterization of 4H-SiC Homoepitaxial Films on Porous 4H-SiC from Bis(trimethylsilyl)methane Precursor

4H-SiC homoepitaxial films were grown on 8° off-axis porous 4H-SiC (0001) faces in the temperature range of  by chemical vapor deposition from bis(trimethylsilyl)methane (BTMSM) precursor. The activation energy for growth was 5.6 kcal/mol, indicating that the film growth is dominated by the diffusion-limited mechanism. Triangular stacking faults were incorporated in the SiC thin film grown at low temperature of 1280°C due to the formation of 3C-SiC polytype. Moreover, super-screw dislocations appeared seriously in the SiC film grown below 1320°C. Clean and featureless morphology was observed in the SiC film grown below 25 standard cubic centimeters per minute (sccm)  carrier gas flow rate of BTMSM at 1380°C while 3C-SiC polytype with double positioning boundaries grew at 30 sccm flow rate of BTMSM. The dislocation density of the epi layer was strongly influenced by the growth temperature and flow rate of BTMSM. Double axis crystal X-ray diffraction and optical microscopy analysis revealed that the dislocation density decreased at the higher growth temperature and lower flow rate of BTMSM. The full width at half maximum of the rocking curve of the film grown at optimized condition was 7.6 arcsec and the sharp free exciton and Al bound exciton lines appear in the epi layer, which indicates that the 4H-SiC film was of very high quality. © 2003 The Electrochemical Society. All rights reserved.

Source:IOPscience

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Mar 29, 2020

Angle-Resolved Photoelectron Spectroscopy Studies of Initial Stage of Thermal Oxidation on 4H-SiC (0001) on-Axis and 4° Off-Axis Substrates

t is a key for improving the performance of SiC MOSFET to clarify SiO2/SiC interface structure formed by thermal oxidation. We have investigated the initial stage of thermal oxidation on 4H-SiC (0001) on-axis and 4° off-axis substrates using angle-resolved photoelectron spectroscopy. The changes of the Si 2p3/2 and C 1s photoelectron spectra show that the off-axis has an influence on the chemical bonding state of SiO2/SiC. On the other hand, there isn't difference in the oxidation rate between on-axis 4H-SiC(0001) and 4° off-axis 4H-SiC(0001).

Source:IOPscience

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Mar 23, 2020

Effect of carbon in Si oxide interlayers of the Al2O3/4H-SiC structure on interfacial reaction by oxygen radical treatment

The interface state density of Al2O3/4H-SiC can be decreased by oxygen radical treatment at room temperature, so we have systematically investigated the mechanism of the interfacial reaction at Al2O3/4H-SiC during oxygen radical treatment. In this study we focus on the characteristics of the Si oxide interlayer, namely whether carbon atoms are included in the film or not, because the interfacial reactions induced by oxygen radical treatment for Al2O3/4H-SiC and Al2O3/Si are different. It is revealed that decarbonization of the SiC x O y layer occurs when the SiC x O y surface is directly exposed to oxygen radicals. Then, the difference in the interfacial reaction caused by oxygen radical treatment between Al2O3/4H-SiC and Al2O3/Si is investigated by intentionally forming SiC x O y and SiO2 interlayers at the Al2O3/4H-SiC interface. Finally, the possible reaction mechanism is discussed on the basis of experimental results. All the results are qualitatively (but clearly) understood by considering that decarbonization of SiC x O y occurs as the starting point.

Source:IOPscience

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Mar 17, 2020

Mechanism of phosphorus passivation of near-interface oxide traps in 4H–SiC MOS devices investigated by CCDLTS and DFT calculation

Interfacial charge trapping in 4H–SiC MOS capacitors with P doped SiO2 or phospho-silicate glass (PSG) as a gate dielectric has been investigated with temperature dependent capacitance–voltage measurements and constant capacitance deep level transient spectroscopy (CCDLTS) measurements. The measurements indicate that P doping in the dielectric results in significant reduction of near-interface electron traps that have energy levels within 0.5 eV of the 4H–SiC conduction band edge. Extracted trap densities confirm that the phosphorus induced near-interface trap reduction is significantly more effective than interfacial nitridation, which is typically used for 4H–SiC MOSFET processing. The CCDLTS measurements reveal that the two broad near-interface trap peaks, named 'O1' and 'O2', with activation energies around 0.15 eV and 0.4 eV below the 4H–SiC conduction band that are typically observed in thermal oxides on 4H–SiC, are also present in PSG devices. Previous atomic scale ab initio calculations suggested these O1 and O2 traps to be carbon dimers substituted for oxygen dimers (CO=CO) and interstitial Si (Sii) in SiO2, respectively. Theoretical considerations in this work suggest that the presence of P in the near-interfacial region reduces the stability of the CO=CO defects and reduces the density of Sii defects through the network restructuring. Qualitative comparison of results in this work and reported work suggest that the O1 and O2 traps in SiO2/4H–SiC MOS system negatively impact channel mobility in 4H–SiC MOSFETs.


Source:IOPscience

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Mar 10, 2020

Fermi-level pinning at metal/4H-SiC contact induced by SiC x O y interlayer

We investigated the impact of defects formed at the SiO2/4H-SiC interface on the Schottky barrier height of metal/4H-SiC(0001) contacts. We found that an ultra-thin SiC x O y layer remains on the 4H-SiC surface after SiO2 sputtering at various powers and its removal by diluted hydro fluoride solution. Ni, Mo, or Al was deposited on 4H-SiC surface without and with a residual SiC x O y layer. It was found that metal/4H-SiC contacts without a residual SiC x O y layer exhibit ideal Schottky property, while Fermi-level pinning (FLP) is caused for metal/4H-SiC contacts with a residual SiC x Oy layer, and the degree of FLP increases increasing sputtering power of SiO2. The pinning position was estimated to be ~0.8 eV below the conduction band minimum of 4H-SiC, which does not correspond to the charge neutrality level of 4H-SiC. Finally, we proposed a physical model where a SiC x O y interlayer causes FLP, and the model was experimentally verified by intentionally forming a SiC x O y interlayer.


Source:IOPscience

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