A model of the off-behaviour of 4H–SiC power JFETs

Highlights

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A physical model of 4H–SiC VJFET off-behaviour up to the blocking voltage.

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Modelling of the voltage barrier as a function of V_DS and V_GS.

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Relations of the geometrical and physical parameters on I_D–V_DS characteristics.

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Good accuracy with numerical simulations and experimental measurements.

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Abstract

A physical model of the off-behaviour of Vertical Junction Field Effect Transistors (VJFETs) up to their blocking voltage limit is presented. Since the drain current, I_D, of these devices strongly depends on the amount of the voltage barrier occurring in the channel, the model is capable to describe the drain voltage dependence of the voltage barrier and of I_D from V_DS = 0 V up to maximum V_DS value (kV) sustained from device and to describe the effects of geometry and doping of channel. The accuracy of the model is proven by comparing the I_D–V_DS curves with numerical simulations of devices designed with different gate depth, channel width, and epilayer thickness. The agreement between model, numerical simulations and literature data confirms the capability of model to describe the I_D–V_DS curves of devices having a pentode or triode like behaviour.

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Graphical abstract

Keywords

• 4H Polytype of silicon carbide (4H–SiC); 
• Blocking voltage; 
• Power JFETs;
• Semiconductor device modelling
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    • Source:Sciencedirect
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